The roofline. Where owning more FLOPs stops helping.

A kernel is limited either by compute or by memory bandwidth, decided by its arithmetic intensity (FLOPs done per byte moved). Below the ridge you are memory bound and the tensor cores sit idle. Drag the marker along the intensity axis, or snap it to a real workload, and watch the same chip run at peak or at a fraction of a percent.

Training lives on the right and runs the chip near its peak, while single stream decode lives on the far left at a fraction of a percent, on the very same silicon. That gap is why inference chips and training chips have begun to diverge.

Peaks are illustrative H100 class (bf16 dense). Peak compute 990 TFLOP/s, HBM bandwidth 3.35 TB/s, ridge point near 296 FLOP per byte. Attainable performance is the minimum of the flat compute roof and the slanted memory roof (bandwidth times intensity). Absolute numbers are illustrative, the shape is the point.